Publications

(2022). Multi-Layer In-Memory Computing. 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO).

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(2021). In-/Near-Memory Computing. Synthesis Lectures on Computer Architecture.

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(2021). A 2.46M Reads/s Seed-Extension Accelerator for Next-Generation Sequencing Using a String-Independent PE Array. IEEE Journal of Solid-State Circuits.

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(2020). SeedEx: A Genome Sequencing Accelerator for Optimal Alignments in Subminimal Space. 2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).

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(2019). .

(2019). Near-Memory Data Transformation for Efficient Sparse Matrix Multi-Vector Multiplication. Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis.

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(2019). Duality Cache for Data Parallel Acceleration. Proceedings of the 46th International Symposium on Computer Architecture.

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(2018). AxNoC: Low-power Approximate Network-on-Chips using Critical-Path Isolation. 2018 Twelfth IEEE/ACM International Symposium on Networks-on-Chip (NOCS).

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(2018). GenAx: A Genome Sequencing Accelerator. 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA).

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(2018). In-Memory Data Parallel Processor. Proceedings of the Twenty-Third International Conference on Architectural Support for Programming Languages and Operating Systems.

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(2017). High-Bandwidth Low-Latency Approximate Interconnection Networks. 2017 IEEE International Symposium on High Performance Computer Architecture (HPCA).

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(2016). Randomizing packet memory networks for low-latency processor-memory communication. 2016 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP).

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