Daichi Fujiki

Daichi Fujiki

Assistant Professor

Keio University

Daichi Fujiki is an Assistant Professor in Computer Science and Informatics at Keio University. His research interests include memory-centric computing for general and application-specific workloads, and domain-specific architectures. He is leading the Data-Centric Computing Laboratory, which develops compute capable memory architectures and custom acceleration frameworks for bioinformatics workloads.

He received Ph.D. in 2022 and M.S.Eng in 2017 from the University of Michigan, Ann Arbor, and B.E. in 2016 from Keio University, Japan.

View my full profile

興味・関心
  • In-memory Computing
  • Computing for Genomics and Precision Health
  • Privacy Preserved Computing
学歴
  • Ph.D. in Computer Science and Engineering, 2022

    University of Michigan, Ann Arbor

  • M.S.Eng. in Computer Science and Engineering, 2017

    University of Michigan, Ann Arbor

  • B.E. in Computer Science and Informatics, 2016

    Keio University

Research Topics

HW/SW Co-design
In-Memory Computing
Genome Sequencing Acceleration

Experience

 
 
 
 
 
Assisntant Professor
Keio University
4月 2022 – Present Tokyo, Japan
 
 
 
 
 
AI Research Intern
Facebook AI Research
9月 2020 – 12月 2020 Remote Location
Project: Performance Characterization and Hardware Acceleration of GNNs for Recommendation System
 
 
 
 
 
GPU Architecture Intern
Samsung SARC/ACL
6月 2019 – 8月 2019 San Jose
Project: Energy Efficient Mobile GPU Shader Architecture
 
 
 
 
 
Research Intern
NVIDIA
6月 2018 – 8月 2018 Austin
Project: Near Memory Data Transformation for Sparse Workloads
 
 
 
 
 
Instructor
Tokyo University of Technology
4月 2016 – 8月 2016 Tokyo
Taught Computer Literacy class

Recent Publications

All Publications

Multi-Layer In-Memory Computing
A 2.46M Reads/s Seed-Extension Accelerator for Next-Generation Sequencing Using a String-Independent PE Array
In-/Near-Memory Computing
In-/Near-Memory Computing
SeedEx: A Genome Sequencing Accelerator for Optimal Alignments in Subminimal Space
Duality Cache for Data Parallel Acceleration
Near-Memory Data Transformation for Efficient Sparse Matrix Multi-Vector Multiplication
In-Memory Data Parallel Processor